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EM MICROELECTRONIC - MARIN SA
EM3027
Real Time Clock with I2C or SPI, Crystal Temperature Compensation, Battery Switchover and Trickle Charger
Description The EM3027 is an Ultra Low Power CMOS real-time clock IC with two serial interface modes: I2C or SPI. The interface mode is selected by the chip version (see 12). The basic clock is obtained from the 32.768 kHz crystal oscillator. A thermal compensation of the frequency is based on the temperature measurement and calculation of the correction value. The temperature can be measured internally or be input by an external application to the register. The chip provides clock and calendar information in BCD format with alarm possibility. The actual contents are latched at the beginning of a read transmission and afterwards data are read without clock counter data corruption. An integrated 16-bit timer can run in Zero-Stop or AutoReload mode. An interrupt request signal can be provided through INT/IRQ pin generated from alarm, timer, voltage detector and Self-Recovery system. An integrated trickle charger allows recharging backup supply VBack from the main supply voltage VCC through internal resistor(s). The internal device supply will switchover to VCC when VCC is higher than VBack and vice versa. The device operates over a wide 1.4 to 5.5V supply range and requires only 900 nA at 5V. It can detect internally two supply voltage levels. Applications Utility meters Battery operated and portable equipment Consumer electronics White/brown goods Pay phones Cash registers Personal computers Programmable controller systems Data loggers Features Fully operational from 2.1 to 5.5V Supply current typically 600 nA at 1.4V Thermal compensated crystal frequency Oscillator stability 0.5 ppm / Volt Counter for seconds, minutes, hours, day of week, date months, years in BCD format and alarm Leap year compensation 16-bits timer with 2 working modes Two low voltage detection levels VLow1, VLow2 Automatic supply switchover 2 Serial communication via I2C (I C-bus specification Rev. 03 compatible - see 10.2) or SPI (3-line SPIbus with separate combinable data input and output) Thermometer readable by the host Trickle charger to maintain battery charge Integrated oscillator capacitors Two EEPROM and 8 RAM data bytes for application Digital Self-Recovery system No busy states and no risk of corrupted data while accessing One hour periodical configuration registers refresh Support for standard UL1642 for Lithium batteries Standard temperature range: -40C to +85C Extended temperature range: -40C to +125C Packages: TSSOP8, TSSOP14, SO8. Block Diagram
EM3027
Temperature Sensor
X1
Oscillator
X2 VCC VREG VBack SCL/SCK SDA/SO SI CS CLKOUT INT or IRQ CLKOE
Watch & Alarm - Seconds - Minutes - Hours - Days - Weekdays - Months - Years Timer
Power Management
I2C or SPI
Output Control EEPROM
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Table of contents
Table of contents..................................................................................................................................................................... 2 1 Packages / Pin Out Configuration .................................................................................................................................... 3 2 Absolute Maximum Ratings.............................................................................................................................................. 4 2.1 Handling Procedures................................................................................................................................................. 4 2.2 Operating Conditions ................................................................................................................................................ 4 2.3 Crystal characteristics ............................................................................................................................................... 4 2.4 EEPROM Characteristics .......................................................................................................................................... 4 3 Electrical Characteristics .................................................................................................................................................. 4 4 EM3027 Block Diagram and Application Schematic......................................................................................................... 6 4.1 Block Diagram........................................................................................................................................................... 6 4.2 Application Schematic ............................................................................................................................................... 6 4.3 Crystal Thermal Behaviour........................................................................................................................................ 7 4.4 Crystal Calibration..................................................................................................................................................... 8 5 Memory Mapping.............................................................................................................................................................. 9 6 Definitions of terms in the memory mapping .................................................................................................................. 10 7 Serial communication ..................................................................................................................................................... 12 7.1 How to perform data transmission through I2C ....................................................................................................... 12 7.2 How to perform data transmission through SPI....................................................................................................... 13 8 Functional Description.................................................................................................................................................... 15 8.1 Start after power-up ................................................................................................................................................ 15 8.2 Normal Mode function ............................................................................................................................................. 15 8.3 Watch and Alarm function ....................................................................................................................................... 15 8.4 Timer function ......................................................................................................................................................... 16 8.5 Temperature measurement..................................................................................................................................... 16 8.6 Frequency compensation ........................................................................................................................................ 16 8.7 EEPROM memory................................................................................................................................................... 17 8.8 RAM User Memory.................................................................................................................................................. 18 8.9 Status Register........................................................................................................................................................ 18 8.10 Interrupts ............................................................................................................................................................ 18 8.11 Self-Recovery System (SRS) ............................................................................................................................. 19 8.12 Register Map ...................................................................................................................................................... 19 8.13 Crystal Oscillator and Prescaler ......................................................................................................................... 19 9 Power Management ................................................................................................................................................ 20 9.1 Power Supplies, Switchover and Trickle Charger ................................................................................................... 20 9.2 Low Supply Detection ............................................................................................................................................. 21 10 AC Characteristics .................................................................................................................................................. 22 10.1 AC characteristics - I2C ..................................................................................................................................... 22 10.2 I2C Specification compliance ............................................................................................................................. 23 10.3 AC characteristics - SPI..................................................................................................................................... 24 11 Package Information ............................................................................................................................................... 26 11.1 TSSOP-08/14 ..................................................................................................................................................... 26 11.2 SO-8................................................................................................................................................................... 27 12 Ordering Information ............................................................................................................................................... 28
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Packages / Pin Out Configuration
Pin 1 2 3 4 5 6 7 8 Table 1 Name X1 X2 VBack VSS SDA SCL IRQ/CLKOUT VCC Function 32.768 kHz crystal input 32.768 kHz crystal output Backup Supply Ground Supply Serial Data Serial Clock Interrupt Request/Clock output Positive Supply
SO8-TSSOP8
X1 X2 VBack Vss Vcc IRQ/CLKOUT
EM3027
SCL SDA
I2C
TSSOP14 X1 X2 SI NC CLKOE VCC
Pin 1 2 3 4 5 6 7 8 9 10 11 12 13
Name X1 X2 SI VReg VBack INT VSS SO SCK CS IRQ/CLKOUT VCC CLKOE
VReg VBack
INT Vss
EM3027
IRQ/CLKOUT CS SCK SO
SPI
14 NC Table 2
Function 32.768 kHz crystal input 32.768 kHz crystal output Serial Data input Regulated Voltage - Reserved for test purpose (This output must be left unconnected) Backup Supply Interrupt Request output (Open Drain active low) Ground Supply Serial Data output Serial Clock input Chip Select input Interrupt Request/Clock output Positive Supply Clock Output Enable CLKOE = `0' CLKOUT is low CLKOE = `1' CLKOUT is output Not Connected
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Absolute Maximum Ratings
Symbol VCCmax VCCmin Vmax Vmin TSTOmax TSTOmin VSmax Conditions VSS + 6.0V VSS - 0.3V VCC + 0.3V VSS - 0.3V +150C -65C 2000V Operating Conditions
Parameter Symbol Min Typ Max Unit TA Operating Temp. -40 Supply voltage VCC, 1.4 5.0 VBack (Note 1) Capacitor at VCC, CD 100 VBack Table 4 Note 1: Refer to paragraphs 9.1 and 9.2
Parameter Maximum voltage at VCC Minimum voltage at VCC Maximum voltage at any signal pin Minimum voltage at any signal pin Maximum storage temperature Minimum storage temperature Electrostatic discharge maximum to MIL-STD-883C method 3015.7 with ref. to VSS Table 3
+125 5.5
C V nF
2.3
Crystal characteristics
Symbol Min Typ Max Unit
Parameter
Stresses above these listed maximum ratings may cause permanent damages to the device. Exposure beyond specified operating conditions may affect device reliability or cause malfunction.
Frequency Load capacitance Series resistance Table 5
f CL RS
7
32.768 kHz 8.2 12.5 pF 70 110 k
Crystal Reference : Micro Crystal CC5V-T1A web: www.microcrystal.com 2.4 EEPROM Characteristics
Symbol Min Typ Max Unit
Parameter
2.1
Handling Procedures
This device has built-in protection against high static voltages or electric fields; however, anti-static precautions must be taken as for any other CMOS component. Unless otherwise specified, proper operation can only occur when all terminal voltages are kept within the voltage range. Unused inputs must always be tied to a defined logic voltage level. 2.2
Read voltage Programming Voltage EEPROM Programming Time Write/Erase Cycling Table 6
VRead VProg TProg
1.4 2.2 30 5000
V V ms cycles
3
Electrical Characteristics
Symbol
Parameter Total supply current with Crystal
ICC
Test Conditions All outputs open, Rs < 70 k, VBack = 0V I2C: SDA, SCL at VCC, Clk/Int='0' SPI: All inputs at VSS All outputs open, Rs < 70 k, VCC = 0V I2C: SDA, SCL at VBack, Clk/Int='0' SPI: All inputs at VSS VBack 1.4 3.3 5.0
VCC 1.4 3.3 5.0
Temp. C -40 to 85 -40 to 125 -40 to 85 -40 to 125 -40 to 85 -40 to 125
Min
Typ 0.6 0.8 0.9
Max 1.5 4.6 2.0 5.2 2.2 5.5
Unit
A
Total supply current with Crystal
IBack
0
Dynamic current I2C
IDD
SCL = 100kHz (See Note 1) SCL = 400kHz (See Note 1) SCL = 400kHz (See note 1)
1.4 3.3 5.0
-40 to 85 -40 to 125 -40 to 85 -40 to 125 -40 to 85 -40 to 125 -40 to 85 -40 to 125 -40 to 85 -40 to 125 -40 to 85 -40 to 125
0.6 0.8 0.9
1.5 4.6 2.0 5.2 2.2 5.5 12 15 35 40 50 60
A
A
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Parameter Dynamic current SPI Interface Symbol IDD Test Conditions SCK = 200 kHz (See Note 2) SCK = 1 MHz (See Note 2) SCK = 1 MHz (See Note 2) Relative to VCC Relative to VCC VCC with respect to VBack = 3.0V CS, CLKOE, SI, SCL/SCK, SDA 0.0 < VIN < VCC IOL = 0.4 mA IOH = 0.1 mA IOL = 1.5 mA IOH = 1.5 mA IOL = 5.0 mA IOH = 2.0 mA 1.4 to 5.0 1.4 to 5.0 -40 to 85 -40 to 125 -40 to 125 VCC 1.4 3.3 5.0 Temp. C -40 to 85 -40 to 125 -40 to 85 -40 to 125 -40 to 85 -40 to 125 -40 to 125 -40 to 125 -40 to 125 Min Typ Max 14 18 50 55 65 75 2.1 1.4 20 0.2VCC 0.8VCC -1 -1.5 1 1.5 0.2 1.4 1.0 0.25 3.3 -40 to 125 2.7 0.8 5.0 -40 to 125 4.5 -1 -1.5 1.2 0.5 1 0.5 13.5 pF 25 25 25 25 25 -40 to 85 -40 to 125 13.5 80 20 5.0 1.5 +/- 1 +/- 1 +/- 3 +/- 6 3 3 2 1 1.5 V V V Unit A
Low supply detection level1 Low supply detection level2 Switchover hysteresis Input Parameters Low level input voltage High level input voltage Input Leakage Output Parameters Low level output voltage High level output voltage Low level output voltage High level output voltage Low level output voltage High level output voltage Output HiZ leakage on INT Oscillator Start-up voltage Start-up time
Vlow1 Vlow2 Vhyst VIL VIH IIN VOL VOH VOL VOH VOL VOH ILEAK_OUT VSTA TSTA
1.8 1.0
V V mV V
1.4 to 5.0
A
INT not active TSTA < 10s
1.4 to 5.0
-40 to 85 -40 to 125 -40 to 125 -40 to 85 -40 to 125 25 25
A V s s
ppm/ V
5.0 1.8V VCC 5.5V, TA = +25C TA = +25C, f = 32.768kHz, Vmeas = 0.3V (Note 3) TA = +25C, f = 32.768kHz, Vmeas = 0.3V (Note 3) VCC =5.0V, VBack=3.0V VCC =5.0V, VBack=3.0V VCC =5.0V, VBack=3.0V VCC =5.0V, VBack=3.0V Vlow1 < VCC 5.5V
Frequency stability over voltage Input capacitance on X1 Output capacitance on X2 Trickle Charger Current limiting Resistors
f/(f V) CIN COUT
R80k R20k R5k R1.5k TE
k
Thermometer Precision Table 7 The following parameters are tested during production test: IDD, Vlow1, Vlow2, VIL, VIH, VOL, VOH, IIN, ILEAK_OUT The parameters ICC, Vhyst, VSTA, TSTA, CIN, COUT, f/(f*V), TE are characterised during the qualification of the IC. Notes: 1. SDA = VSS, continuous clock applied at SCL (VIL_SCL < 0.05V, VIH_SCL > 0.95VCC) 2. CS, SI = VCC, continuous clock applied at SCK, SO not connected. (VIL_SCK < 0.05VCC, VIH_SCK > 0.95VCC) Note that there is a 100k pull-down resistor on CS. 3. Vmeas : Peak to peak amplitude during capacitance measurement
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4.1 EM3027 Block Diagram and Application Schematic Block Diagram
VBack Vcc Vss
Switchover
VHigh
Voltage Regulator
Voltage Monitoring
VREG
X1 X2
Xtal Oscillator
Prescaler RTC RAM
32.768 kHz
EEPROM Control Inputs Stages I2C SPI
SCL/SCK SI CS SDA/SO
Thermometer Output Buffers CLKOE
SDA/SO INT
CLKOUT
4.2
Application Schematic
Crystal Layout Example
VCC Supply CD VCC X1 for application use CLKOUT X2
X2
X1
Crystal
EM3027
CLKOE INT CS, SCL/SCK SDA/SO SI VSS
VCC
VBack Protection Resistor * Lithium Battery or Super Cap CD
Controller
Serial Interface
VSS
VSS = 0V
* optional for Lithium batteries (<1k)
Figure1: Application Schematic
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4.3 Crystal Thermal Behaviour
The following formula expresses a compensation value to be used during frequency correction. COMP_val = Qcoef x (T - To)
Qcoef T TO XtalOffset COMP_val
-300
The frequency of the crystal is dependent on the temperature concurring with the following diagram:
0 F [ppm] FO -100
2
- XtalOffset
2
-200
- Thermal quadratic coefficient [ppm/C ] - Actual temperature [C] - Turnover temperature [C] - Crystal offset at TO [ppm] - Compensation value result [ppm]
-400 TO-100 T O-50 TO T O+50 T O+100 T [C]
Temperature [C]
Figure 1: Crystal thermal behaviour
TO - Turnover temperature [C] FO - Crystal frequency when TO [Hz]
The oscillator frequency is adjusted according to the equation above by using coefficients located in the EEPROM control page and the temperature. The actual temperature can be obtained from the internal thermometer or from Temp register updated externally by an application. The principle of the frequency compensation is based on adding/removing of pulses.
Example 1: Qcoef=0.035; TO=25; XtalOffset=-100
Example 2: Qcoef=0.035; TO=25; XtalOffset=+100
400
[ppm]
600 [ppm]
300
400
200
200
100
Temperature
Temperature 0 -50 0 50 100 150
-50
0 0 -100 50 100 150
-200
-200
-400
Compensation Value Crystal Error
-300
Compensation Value Crystal Error
-400
-600
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4.4 Crystal Calibration 5) Find a quadratic regression of the measured dependency in form:
2 2 ferr = -c1(T - c2) + c3 or fO = aT + bT + c.
In order to compensate temperature dependency of the used crystal, correct values of XtalOffset, Qcoef and TO parameters shall be stored in EEPROM Control Page. User is advised to follow these steps in order to compute the parameters in a correct way: 1) 2) Supply the chip from VCC pin. Set FD0 = FD1 = `0'. Set CLKOE pin to '1'. This provides the uncompensated frequency signal from the crystal oscillator directly on pin CLKOUT. Measure output frequency fO at different temperatures (at least five measurements in equidistant points in the whole desired temperature range are recommended). Please note that quartz crystal needs few minutes to stabilise its frequency at a given temperature. Compute frequency deviation ferr of output frequency fo from the ideal (target) frequency fL = 32.768Hz in all measured points as follows: ferr = (fo-fL)/fo .
6)
Then real values of the searched parameters can be obtained from the following relations: Qcoefreal = c1 = -a, T0_real = c2 = -b/(2a),
2 XtalOffsetreal = c3 = c - b /(4a).
3)
7)
The values to be stored in EEPROM Control Page have to be corrected in the following way: Qcoef = 4096*(1.05*Qcoefreal), T0 = T0_real - 4,
4)
XtalOffset = 1.05*XtalOffsetreal.
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Memory Mapping
Address Page [6..3] Control Page 00000 000 0x00 OnOffCtrl Default 001 0x01 IRQctrl Default 010 011 100 Watch Page 00001 000 001 010 011 100 101 110 Alarm Page 00010 000 01 010 011 100 101 110 Timer Page 00011 000 001 Temperature Page 00100 000 0x20 Temp -60-195 C 0x18 0x19 Timer low byte Timer high byte 0-255 0-255 0x10 0x11 0x12 0x13 0x14 0x15 0x16 Alarm Seconds Alarm Minutes Alarm Hours Alarm Date Alarm Days Alarm Months Alarm Years 0 - 59 BCD 0 - 59 BCD
0 - 23 BCD 1 - 12 BCD
Addr [2..0]
Hex
Description
Range
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
Clk/Int 1
TD1 0
TD0 0
SROn 1 SRIntE 0 SRF
EERefOn 1 V2IntE 0 V2F VLOW2
TROn 0 V1IntE 0 V1F VLOW1
TiOn 0 TIntE 0 TF
WaOn 1 AIntE 0 AF
0x02 0x03 0x04
IRQflags Status RstCtrl Watch Seconds Watch Minutes Watch Hours Watch Date Watch Days Watch Months Watch Years
---------0 - 59 BCD 0 - 59 BCD
0 - 23 BCD 1 - 12 BCD
EEBusy
PON
SR SYSRes
0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E
Seconds Tens Minutes Tens S12/24 pm/2
Hours Tens
Seconds Units Minutes Units Hours Units Date Units Days Units
Months Tens
1 - 31 BCD 1 - 7 BCD 1 - 12 BCD 0 - 79 BCD SecEq MinEq HourEq DateEq DayEq
Date Tens
Months Units Years Units Seconds Units Minutes Units Hours Units Date Units Days Units
Years Tens Seconds Tens Minutes Tens pm/2
Hours Tens
1 - 31 BCD 1 - 7 BCD
Date Tens
Months Tens
1 - 12 BCD MonthEq 0 - 79 BCD YearEq Years Tens
Months Units Years Units
EEPROM Data Page - Configuration Registers 00101 000 001 0x28 0x29 EEData ---EEPROM user data (2 bytes)
EEPROM Control Page - Configuration Registers 00110 000 0x30 XtalOffset 001 0x31 Qcoef 010 0x32 TurnOver 011 RAM Page (User data RAM) 00111 000-111 0x380x3F RAMdata ---8 bytes of data 0x33 EEctrl ---Default 121 Default ---Default 4-67 C Default R80k 0 sign R20k 0 R5k 0 R1.5k 0 FD1 0 FD0 0 ThEn 1 ThPer 0 -
Table 8 Unused bit (Read as zero; write has no influence)
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Notes and Settings: - Only pages 0 to 7 are used. Unused pages are for test purposes. The application should not write into unused pages and addresses. - The crystal offset must be set to within 121 ppm. - Zero values are read from unused addresses. - Watch, Alarm, Timer pages have to be set by an application before use. - The bit 7 (MSB) of the Alarm registers (SecEq, MinEq.) have to be set to `1' to perform the comparison. (See paragraph 8.3)
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Definitions of terms in the memory mapping
Clk/Int TD0, TD1 SROn EERefOn TROn TiOn WaOn Selects if clock or interrupt is applied onto the IRQ/CLKOUT pin ('0' = IRQ output; '1' = CLKOUT output) - CLKOUT output is the default state after reset Selects decrement rates for Timer (32 Hz after reset) Enables Self-Recovery function (ON after reset) Enables Configuration registers refresh each 1 hour (ON after reset) Enables Timer Auto-reload mode (`0' - reload disabled; `1' - reload enabled) Enables Timer (OFF after reset) Enables 1 Hz clock for Watch (ON after initialisation)
Control Page - Register OnOffCtrl
Control Page - Register IRQctrl SRIntE V2IntE V1IntE TIntE AIntE Self-Recovery interrupt enable VLOW2 interrupt enable VLOW1 interrupt enable Timer interrupt enable Alarm interrupt enable
Control Page - Register IRQflags SRF Self-Recovery interrupt flag (bit is set to `1' when Self-Recovery reset is generated) V2F VLOW2 interrupt flag (bit is set to `1' when power drops below Vlow2) V1F VLOW1 interrupt flag (bit is set to `1' when power drops below Vlow1) TF Timer interrupt flag (bit is set to `1' when Timer reaches ZERO) AF Alarm interrupt flag (bit is set to `1' when Watch matches Alarm) NOTE: Flags can be cleared by `0' writing. Control Page - Register Status EEBusy PON SR VLOW2 VLOW1 EEPROM is busy (bit is set to `1' when EEPROM write or Configuration Registers refresh is in progress) (Read Only) Power ON (bit is set to `1' at Power On; clear by `0' writing) Self-Recovery reset or System reset detected (clear by `0' writing) Voltage level VCC or VBack below Vlow2 level (clear by `0' writing) Voltage level VCC or VBack below Vlow1 level (clear by `0' writing)
Control Page - Register RstCtrl SYSRes System reset register; writing `1' will initiate restart of the logic (Watch, Alarm and Timer parts excluded). After the restart, status bit SR is set. The register is cleared after restart of the logic.
Watch Page - Registers Watch Seconds, Watch Minutes, Watch Hours, Watch Date, Watch Days, Watch Months, Watch Years Watch information (BCD format) S12/24 12-hours or 24-hours format selection; 12-hours: S12/24 = `1', 24-hours: S12/24 = `0' PM/2 S12/24 = `0' PM/2 represents value `2' of tens, S12/24 = '1' PM/2 = `1' represents PM (afternoon), PM/2 ='0' represents AM (morning) Alarm Page - Registers Alarm Seconds, Alarm Minutes, Alarm Hours, Alarm Date, Alarm Days, Alarm Months, Alarm Years Alarm information (BCD format) PM/2 S12/24 = `0' PM/2 represents value `2' of tens, S12/24 = '1' PM/2 = `1' represents PM (afternoon), PM/2 ='0' represents AM (morning)
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Timer Page - Registers TimLow, TimHigh TimLow TimHigh Timer value (Low byte) Timer value (High byte)
Temperature Page - Register Temp Temp Temperature (range from -60 C to 190C with 0C corresponding to a content of 60d)
EEPROM Data Page - Register EEData EEData General purpose EEPROM data bytes
EEPROM Control Page - Register EEctrl R80k, R20k, R5k, R1.5k FD0, FD1 ThEn ThPer Selects trickle charger resistors between VHigh and VBack Selects clock frequency at IRQ/CLKOUT pin. Enables thermometer (`0' = disabled; `1' = enabled) Selects thermometer activation period (`0' = 1 second; `1' = 16 seconds)
EEPROM Control Page - Register XtalOffset XtalOffset Crystal frequency deviation at Turnover temperature TO in ppm. Example: value 63d is related to 60 ppm. XtalOffset=1.05*XtalOffsetreal where XtalOffsetreal is real value of crystal frequency deviation at Turnover temperature of the used crystal in ppm. Note: Coefficient 1.05 (exactly 1.048576) is the result of the internally used frequency compensating method.
EEPROM Control Page - Register Qcoef Qcoef Thermal quadratic coefficient of the crystal. Example: value 151d is related to 0.035 ppm/C, Qcoef = 4096 x 1.05 x QCoefreal, where Qcoefreal is real value of thermal quadratic coefficient of the crystal in ppm/C.
EEPROM Control Page - Register TurnOver TurnOver Turnover temperature of the crystal (values 0 to 63d are related to temperature 4 to 67 C). Example: value 21d is related to 25C. T0 = T0_real - 4, where T0_real is real value of Turnover temperature of the crystal in C. RAM Page - Register RAMdata RAMdata General purpose RAM data bytes
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Serial communication
When the "Transmission START" is detected, a copy of the content of the addressed Watch-, Alarm-, Timer- and Temperature-register is stored into a cache memory. Data for a following read access are provided from this cache memory. Data in the cache memory are stable until the "Transmission STOP". During a write access, data are written into the cache memory. When the "Transmission STOP" of a WRITE transmission is detected, the content of modified registers in the cache memory is copied back into the Watch-, Alarm, Timer- and/or Temperature-register. Depending on the EM3027 version, the serial communication is performed in I2C or SPI mode. A serial communication with the EM3027 starts with a "Transmission START" and terminates with the "Transmission STOP". "Transmission START" I2C - START condition SPI - CS goes to `1' "Transmission STOP" I2C - STOP condition SPI - CS goes to `0'
7.1
How to perform data transmission through I2C In the EM3027, the upper 5 bits of a register address form a "page address", the 3 lower bits are an autoincrementing sub-address. The "page-address" is defined by a WRITE transmission. During a transmission, the 3 lower address bits are internally incremented after each data byte. At a READ transmission (R/W = 1), the slave sends data and the master gives the ACK bit(s). The "page-address" shall be defined by a WRITE transmission, completed with the STOP condition. The 3 lower address bits are incremented when an ACK is received. If ACK is not received, no auto-increment of the address is executed and a following read outputs data of the same address. The EM3027 works as slave. Its slave address is fixed to `1010110'.
The I2C protocol is a bidirectional protocol using 2 wires for master-slave communication: SCL (clock) and SDA (data). The two bus lines are driven by open drain outputs and pulled up externally. MSB is sent first. The communication is controlled by the master. To start a transmission, the master applies the START condition and generates the SCL clocks during the whole transmission. The master terminates the transmission by sending the STOP condition. The first byte contains the 7 bit slave address and the R/W bit. The slave address must correspond to the fixed slave address of the EM3027. After each byte, the receiver outputs an acknowledge bit ACK to confirm correct recept of the byte by a `0' level. At a WRITE transmission (R/W = 0), the master sends slave address, register address and data bytes.
I2C: Write transmission Slave Address S 1010110 R/W 0 ACKs Address ACKs Data Byte (1) ACKs Data Byte (n-1) ACKs Data Byte (n) ACKs P
I2C: Read transmission Slave Address S 1010110 R/W 0 ACKs Address ACKs Slave Address P S 1010110 R/W 1 ACKs Data byte (1) ACKm Data byte (n) ACKm P
S ACKs ACKm
... ... ...
start condition sent by the master acknowledge from the receiver (slave) acknowledge from the receiver (master)
R/W P
... ...
read/write select (`0': master writes data) stop condition
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SDA
A6
A5
A1
A0 R/W ACK
D7
D6
D2
D1
D0
ACK
Slave Address
Data Byte, send/receive as many as needed
Read/Write selection bit
1 2 6 7 8 9 1 2 6 7 8 9
SCL Start Condition Stop Condition
Figure 2: I2C Communication Noise suppression circuitry is implemented rejecting spikes shorter than 50ns on SCL and SDA bus lines.
7.2
How to perform data transmission through SPI During a WRITE transmission, the master defines the register address and sends then data bytes, using the auto-increment of the lower address part (bit 2 to 0) within the EM3027. The page address is fixed until a new transmission is started. SO data output of EM3027 is in Hi-Z state during the WRITE transmission. If READ transmission is initiated, data are output after the address byte by the EM3027. The lower part of the address (bit 2 to 0) is automatically incremented after each data byte. The page address is not changed until a new transmission is started. SO is in Hi-Z while the address byte is sent. During data output by SO, the SI input has no influence. When CS is at `0' level, SO is Hi-Z and SCK, SI can be left floating. SO and SI can be connected together to form a 3-wire interface with CS, SCK and Serial Data Input/Output. The EM3027 works as slave. The CS input has a pulldown resistor of 100 k.
The SPI interface connects master and slave circuits. 4 connections are used: CS = Chip Select, SCK = Serial Clock, SI = Serial Data Input and SO = Serial Data Output. SPI is a byte oriented protocol with MSB first mode. Data are changing on SCK falling edge and sampled on rising edge. A transmission is started by the master by rising the CS input of the selected slave to `1'. The transmission is terminated by the master by putting `0' level the CS input. The first bit is the R/W bit, R/W = `0' means a WRITE transmission, where the master sends the data via the SI line. R/W = `1' defines a READ transmission, where the slave outputs the data on the SO line. The following 7 bits of the first byte form the address of the register in the EM3027, where the data are written or read. (MSB is first bit at position 2 in this address byte.) th The not transmitted 8 bit of the register address is set internally to `0'. In the EM3027, the upper 5 bits of an address form a "page address", the 3 lower bits are an auto-incrementing sub-address. The "page-addres'' is defined by a WRITE transmission. During a transmission, the 3 lower address bits are incremented internally after each byte.
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EM3027
Transmission Start
Transmission Stop
CS
SCK
R/W A6 A5 A4 A3 A2 A1 A0 D1
SI
D7
D6
D0
SO
HiZ
Figure 3: SPI Write Transmission
Transmission Start
Transmission Stop
CS
SCK
A6 A5 A1
SI
R/W
A4
A3
A2
A0
SO
HiZ
D7
D6
D1
D0
HiZ
Figure 4: SPI Read Transmission
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8
8.1
Functional Description
Start after power-up
A The chip is in reset state when the supply voltage is below an internal threshold level (PON in Status register 0x03 goes to `1'). When the supply level is higher than this threshold voltage, the reset is released. B When the supply voltage is higher than the oscillator start-up voltage, the basic clocks for Watch and control logic become active after the oscillator start time. C With clocks present, the voltage detector starts in fast mode to measure the supply voltage. When a voltage higher than Vlow2 is detected, the fast detection mode is stopped and the EEPROM read is enabled. D Configuration registers are loaded with the configuration data read from the EEPROM (Addresses from 0x28 to 0x33). E If thermometer is enabled (ThEn='1' and VLOW1='0'), temperature is measured and compensation value for frequency correction evaluated. F The EM3027 starts its normal function, depending on the supply voltage level applied.
8.2
Normal Mode function
The chip has following functions in Normal Mode: 1. 2. 3. 4. 5. 6. 7. 8. Voltage detection - The voltage detection is executed each second. Temperature measurement - It is executed, if thermometer is enabled (ThEn='1') and VLOW1='0'. Frequency compensation - The compensation of the oscillator frequency works continuously. Configuration Registers refresh - The EEPROM is read each hour to refresh the content of the configuration registers (supply voltage must be above Vlow2 for EEPROM read). Watch/Alarm - The Watch function is continuously active, whereas the Alarm function depends on its activation. Timer - Is active when enabled. Self-Recovery system - Is enabled by default (can be disabled by the application). Serial interface - The communication works if VCC > VCC_min and VCC > VBack .
8.3
Watch and Alarm function
The Watch part provides timing information in BCD format. The timing data is composed of seconds, minutes, hours, date, weekdays, months and years. The corresponding values are updated every second. The Watch part setup is provided by Write transmission into the Watch Page (Address 0x08h to 0x0Eh). After the transmission, the Watch is restarted from the setup values after one second. The Alarm function is activated by setting and enabling the alarm registers (Address 0x10h to 0x16h). Each Alarm byte has its own enable bit. It is the bit 7. Recommended combinations of enabled bits are described in the table below. SecEq 1 1 1 1 1 1 MinEq 0 1 1 1 1 1 HrsEq DateEq DaysEq MonthEq 0 0 0 0 0 0 0 0 1 0 0 0 1 1 0 0 1 1 0 1 1 0 1 0 Table 9: Alarm Period Selection YearEq 0 0 0 0 0 0 Al_period min hrs day month year week
- Both Watch and Alarm parts must be set by an application before use - The bits SecEq to YearEq enable the comparison of the corresponding registers
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8.4 Timer function The 16-bit count down timer can be enabled/disabled by TiOn bit. The timer input frequency is selected by TD1, TD0 bits according to the following table: TD1 TD0 Timer frequency 0 0 32 Hz 0 1 8 Hz 1 0 1 Hz 1 1 0.5 Hz Table 10: Timer Frequency Selection The timer can run in Zero-Stop or Auto-Reload mode (TROn bit: `0' = Zero-Stop mode, `1' = Auto-Reload mode). When TROn = `0', then it is possible to read current value of the timer. If TROn = `1', then last written value is read from cache memory. The value in the cache memory is used as the new value for reloading (Auto-Reload mode). Frequency selection (TD1, TD0) and mode selection (TROn) can be written only when the timer is stopped (TiOn = `0'). Timer values (TimLow, TimHigh) can be written only when TiOn = '0' and TROn = `0'. NOTE: The "Timer Page" can also be used as a general purpose register when the timer function is not used.
8.5
Temperature measurement
The integrated thermometer has a resolution of 1C. The thermometer is disabled when ThEn = '0' and enabled when ThEn = '1'. By default, the thermometer is enabled. Thermometer period is selectable by ThPer bit according to the table below: ThPer Period in Seconds 0 1s 1 16 s Table 11: Thermometer Period The thermometer is automatically disabled when VLOW1 status bit is at `1'. When the thermometer is disabled (ThEn = '0'), the Temp register can be written. Temp register uses a cache memory to keep stable value during a whole transaction (read/write).
8.6
Frequency compensation
There is a frequency compensation unit (FCU) inside EM3027. FCU compensates quartz crystal native frequency in dependency on actual compensation value (COMP_val). FCU is always running. During chip power-up, if ThEn = '1' and VLOW1 = `0' temperature measurement is enabled and COMP_val is computed. Otherwise, COMP_val is set to 0 ppm. In Normal mode, new compensation value is computed each 32 seconds. The only exception is when ThEn = `1' and VLOW1 = `1'. In this case, temperature measurement and COMP_val computation are blocked and FCU uses the last computed compensation value. For the evaluation of COMP_val, actual content of Temp register (0x20) is used. The compensation value is computed according to the equation described in paragraph 4.3. Content of Temp register is updated either after a temperature measurement (when ThEn = '1' and VLOW1 = '0') or after Temp register write transaction (when ThEn = '0'). After power-up content of Temp register is undefined. If thermometer is disabled (ThEn = '0') user is advised to periodically update Temp register with actual ambient temperature in order to have correct input data for COMP_val computation.
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EM3027
8.7 EEPROM memory Before any EEPROM access (read/write), the bit EERefOn has to be cleared by the application to prevent from access collision with the Configuration Registers. Then the application has to read EEBusy bit and if EEBusy = `0', then EEPROM access can be started. After the write command (at "Transmission STOP") the current state of EEPROM writing is monitored by EEBusy register bit at `1'. EEBusy goes to `0' when EEPROM writing is finished. NOTE: VCC must be applied during the whole EEPROM write (i.e. until EEBusy = `0') and must be higher than Vprog. Clear EERefOn Clear EERefOn
No
EEBusy = 0 ?
No
EEBusy = 0 ?
Yes Read EEPROM
Yes Write EEPROM
Yes
Next read ?
No
EEBusy = 0 ?
No Set EERefOn Yes
Yes
Next Write ?
No Set EERefOn 8.7.1 EEPROM Control Page
This part is composed of 4 bytes purposed for miscellaneous function control and for crystal compensation constants. EEctrl byte contains: trickle charger selectors (R80k, R20k, R5k, R1.5k); output clock frequency selector (FD1, FD0); thermometer enable and thermometer period selector.
8.7.2
Clock Output
Output clock frequency is selected by FD1, FD0 bits in EEctrl register. FD1 0 0 1 1 FD0 0 1 0 1 Select Clock Output 32.768 kHz Description From crystal oscillator, without frequency compensation
1024 Hz With frequency compensation 32 Hz 1 Hz Table 12: Output Clock frequency selection
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8.7.3 Configuration Registers All the configuration data from EEPROM (i.e. EEctrl, XTalOffset, Qcoef, TurnOver, EEData) is hold in configuration registers. Data from EEPROM is loaded to these registers during power-up sequence and is refreshed each hour, if `Configuration Registers refresh' feature is enabled (EERefOn = `1'). Regular refresh of Configuration Registers prevents their content to be corrupted by strongly polluted electrical environment (EMC problems, disturbed power supply, etc.). It is recommended to enable `Configuration Registers refresh' feature. 8.7.4 EEPROM User Memory
Two bytes of the memory are dedicated for the application (addresses 0x28 and 0x29).
8.8
RAM User Memory
RAM user memory size is 8 bytes (addresses 0x38 to 0x3F). The state of the RAM data after power-up is undefined.
8.9
Status Register
The purpose of EEBusy bit is to inform the user about current status of the EEPROM operations. EEBusy - status of EEPROM controller (if EEBusy = `1', then Configuration Registers refresh or EEPROM write is in progress) The purpose of the following status bits is to record status of power supply voltage and Self-Recovery system/System reset behaviour. PON VLOW1 VLOW2 SR - status of Power-ON - status of Vlow1 voltage detection - status of Vlow2 voltage detection - status of the Self-Recovery system/System reset
If one of these status bits is set, it can be cleared only by writing `0', there is no automatic reset if the set condition disappears.
8.10
Interrupts
There are five interrupt sources which can output an interrupt on (INT and/or IRQ/CLKOUT) pins. The request is generated when at least one of IRQflags goes to `1' (OR function). AF TF V1F V2F SRF - interrupt is provided when Watch time reaches Alarm time settings and comparison is enabled - interrupt is provided when Timer reaches ZERO - interrupt is provided when supply voltage is below Vlow1 (when VLOW1 status bit is set) - interrupt is provided when supply voltage is below Vlow2 (when VLOW2 status bit is set) - interrupt is provided when Self-Recovery system invoked internal reset (when SR status bit is set)
Each interrupt source has its own interrupt enable (AIntE, TIntE, V1IntE, V2IntE, SRIntE). When the interrupt enable is `1' then the appropriate interrupt source is enabled. Interrupt flags (IRQflags) are cleared by `0' writing into the appropriate bit. In case of V1F, V2F and SRF bits, it is necessary to clear also the corresponding status bits (Status) after interrupt bit.
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8.11 Self-Recovery System (SRS) The purpose of the Self-Recovery System (SRS) is to generate an internal reset in case the on-chip state machine goes into a deadlock. The function is based on an internal counter that is periodically reset by the control logic. If the counter is not reset on time, this reset will take place. It is executed after two voltage monitoring periods at the latest, i.e. 2s or 32s (ThPer bit). A possible source of a deadlock could be disturbed electrical environment (EMC problem, disturbed power supply, etc.). SRS sets status bit SR and resets the internal logic, except Watch, Alarm and Timer parts (i.e. time informations are not affected). Furthermore, if the SRS interrupt is enabled (SRIntE='1'), the SRF flag is set after the internal chip reset. Note, that SROn = '1' and SRIntE = '0' after the reset. After the internal reset, the device starts with the power-up sequence (see paragraph 8.1). SRS is automatically enabled after power-up (SROn bit). It can be disabled by writing '0' into the SROn bit in the Control Page.
8.12
Register Map
The address range of the EM3027 is divided into pages. The page is addressed by the five most significant bits of the address (bits 6 ... 3). The three low significant bits of the address provide selection of registers inside the page. During address incrementing the three low significant bits (2 ... 0) are changed. The page address part is fixed during the whole data transmission.
8.13
Crystal Oscillator and Prescaler
The 32.768 kHz crystal oscillator and the clock divider provide the timing signals for the functional blocks. The prescaler block is responsible for frequency division of the 32.768 kHz clock signal from the crystal oscillator. Divided frequency is then distributed between other blocks inside the chip, including Watch, Timer and control logic. Two capacitors CIN and COUT are integrated on chip - see Figure 5.
X2 X1 CIN COUT
Figure 5: Oscillator Capacitors
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EM3027
9
Power Management
VCC
I/O
Switchover
V H igh
V Back V Reg Logic, EEPROM, Thermometer, Voltage Monitor Regulator 2.9V Xtal Oscillator
4x Trickle charger resistors
Figure 6: Power Management
9.1
Power Supplies, Switchover and Trickle Charger In this way, a rechargeable battery or a super-cap can be charged from the VCC voltage, as long as VCC > VBack. There are 4 selectable resistors connected in parallel with typical values of 80k, 20k, 5k and 1.5k. One or more resistors can be selected by EEctrl bits setting. If a Lithium battery shall be connected to VBack pin, a protection resistor of value up to 1k can be connected in series with it. In this way, in case of EM3027 device damage resulting in short between both supply pins, charging current from the VCC supply can be reduced to its allowed maximum level as required by UL1642 standard.
The device can be supplied from the VCC pin or from the VBack pin. The switchover block implemented inside the chip compares VCC and VBack voltages and connects the higher of them to the internal VHigh net that supplies the chip. Nevertheless, the communication pins (SCL, SDA or CS, SCK, SI, SO) are supplied from the VCC pin. For that reason, when serial interface (I2C or SPI) is used, the chip has to be supplied from VCC. (i.e. VCC > VBack). By setting of a trickle charger bit in register EEctrl, a resistor can be inserted between VBack and VHigh voltage.
Clock operating with thermocompensation using either previously in fully operating mode measured or by user stored temperature value; no EEPROM write
min max min max
Serial communication is enabled, if VCC > VCCmin and VCC > Vback
Vlow2
VCCmin
Vlow1
EM3027 fully operating according datasheet (clock, thermometer, thermocompensation)
Vprog
EEPROM write if VCC > Vprog 2.2V 2.0V 3.0V 4.0V 5.0V
VCCmax
1.4V 0V 1.0V
5.5V Supply Voltage
Figure 7: EM3027 operating Voltage Areas
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EM3027
9.2 Low Supply Detection To leave the VLOW1 status, the supply voltage must be increased above the Vlow1 level and a `0' value must be written into the VLOW1 status bit via the serial interface. When the supply voltage drops below the Vlow2 level, the VLOW2 status bit is set by the voltage monitoring system. The VLOW2 status bit disables the read out of the EEPROM. To leave the VLOW2 status, the supply voltage must be increased above the Vlow2 level and a `0' value must be written into the VLOW2 status bit via the serial interface. Below Vlow2 level, device functionality is not guaranteed and register contents can be corrupted. Therefore, if VLOW2 status bit is set, it is recommended to perform system reset by writing of `1' into SYSRes bit in RstCtrl page and afterwards update content of Watch, Alarm and Timer registers. The supply voltage level is monitored periodically versus Vlow1 and Vlow2 levels. The monitoring rate is one second. When the voltage monitoring is running, a higher current consumption for few milliseconds occurs. At the power-up of the device, as long as the supply voltage stays below Vlow2, the monitoring rate is accelerated. To enable normal operation, the chip must be supplied with a voltage above Vlow2, to enable the readout of initialization data from EEPROM and to stop the higher current consumption. When the supply voltage drops from the normal range (from 2.1V to 5.5V) below Vlow1, the VLOW1 status bit is set to `1' by the voltage monitoring system. When bit VLOW1 is at `1', the thermometer is disabled and the automatic computation of the thermal compensation value (COMP_val) for frequency correction is inhibited. In this case, the last computed compensation value is used.
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10 AC Characteristics
10.1 AC characteristics - I2C
VSS = 0V and TA=-40 to +125C, unless otherwise specified
PARAMETER SYMBOL CONDITIONS Vcc 3.0V SCL Clock Frequency fSCL Vcc >1.8V Vcc>1.4V Bus Free Time Between STOP and START Condition Vcc 3.0V tBUF Vcc >1.8V Vcc>1.4V Hold Time (Repeated) START Condition Vcc 3.0V tHD:STA Vcc >1.8V Vcc>1.4V Vcc 3.0V LOW Period of SCL Clock tLOW Vcc >1.8V Vcc>1.4V Vcc 3.0V HIGH Period of SCL Clock tHIGH Vcc >1.8V Vcc>1.4V Vcc 3.0V Setup Time START Condition tSU:STA Vcc >1.8V Vcc>1.4V Vcc 3.0V Data Hold Time tHD:DAT Vcc >1.8V Vcc>1.4V Vcc 3.0V Data Setup Time tSU:DAT Vcc >1.8V Vcc>1.4V Vcc 3.0V Data Valid Time tVD:DAT Vcc >1.8V Vcc>1.4V Vcc 3.0V Data Valid Acknowledge Time tVD:ACK Vcc >1.8V Vcc>1.4V Rise Time of Both SDA and SCL Signals Vcc 3.0V tR Vcc >1.8V Vcc>1.4V Fall Time of Both SDA and SCL Signals (See note 1) Vcc 3.0V tF Vcc >1.8V Vcc>1.4V Setup Time (Repeated) STOP Condition Length of spikes suppressed by the input filter on SCL and SDA Capacitive Load For Each Bus Line I/O Capacitance (SDA, SCL) Vcc 3.0V tSU:STO Vcc >1.8V Vcc>1.4V tSP CB CI/O 20 30 50 50 200 10 ns pF pF ns 1.3 1.7 4.5 0.4 0.5 0.6 20 30 50 20 30 50 50 80 100 1.2 1.5 4.0 0.9 1.1 3.5 200 300 1000 200 300 400 ns ns s s ns ns ns s s 0.2 s 0.4 0.5 1.0 s MIN TYP MAX 400 300 100 kHz UNITS
Table 13: I2C AC characteristics Parameters are guaranteed by design. They are not tested in production.
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Calculation of external pull-up resistor The following conditions have to be met: Rise time is equal to 0.847 RPU (CB + N * CI/O) RPU < tR max / (0.847 (CB + N CI/O)), where N is total number of I/O pins connected to the corresponding bus line. (tR in ns, C in pF, R in k) The minimum value of the pullup resistor value can be calculated with the IOL value of the SDA output: RPU = (Vcc - VOL) / IOL
( IOL: see Table 7, page 5, Output Parameters; e.g. 5mA at VCC = 5.0V, with VOL = 0.8V )
Start SDA
tBUF
Stop
tLOW tR
tHIGH
SCL
tHD:STA tHD:DAT tF tSU:DAT tSU:STO tSU:STA
Figure 8: I2C Timing
10.2
I2C Specification compliance There are, however, the following discrepancies between I2C specification and EM3027 interface: 1) Falling time on SDA driven by EM3027 can be shorter than 20 + 0.1* CB ns. (CB is total capacitive load for SDA bus line in pF) In other words, slope control of falling edges on SDA is missing. Some timing parameters differ from the original I2C specification - refer to Table 13.
EM3027 device with I2C serial interface was designed 2 in compliance with Philips Semiconductors I C-bus specification UM10204 (Rev. 03 - 19 June 2007), Fastmode class (up to 400kbit/s). Device address consists of 7 bits. Clock stretching is not supported. Brief manual to I2C interface read and write transmissions is to be found in 7.1.
2)
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EM3027
10.3 AC characteristics - SPI VSS = 0V and TA=-40 to +125C, unless otherwise specified
PARAMETER SCK Clock Frequency SYMBOL fSCK CONDITIONS Vcc 3.0V Vcc >1.8V Vcc >1.4V Data to SCK setup tDC Vcc 3.0V Vcc >1.8V Vcc >1.4V SCK to Data Hold tCDH Vcc 3.0V Vcc >1.8V Vcc >1.4V SCK to Data Valid tCDD Vcc 3.0V Vcc >1.8V Vcc >1.4V SCK Low Time tCL Vcc 3.0V Vcc >1.8V Vcc >1.4V SCK High Time tCH Vcc 3.0V Vcc >1.8V Vcc >1.4V SCK Rise and Fall tR , tF Vcc 3.0V Vcc >1.8V Vcc >1.4V CS to SCK Setup tCC Vcc 3.0V Vcc >1.8V Vcc >1.4V SCK to CS Hold tCCH Vcc 3.0V Vcc >1.8V Vcc >1.4V CS Inactive Time tCWL Vcc 3.0V Vcc >1.8V Vcc >1.4V CS to Output High Impedance tCDZ Vcc 3.0V Vcc >1.8V Vcc >1.4V 200 300 500 200 300 400 50 100 200 ns ns ns 100 ns 400 700 1500 400 700 1500 200 800 ns ns ns 200 300 500 350 650 1300 ns ns 20 ns MIN TYP MAX 1 600 200 UNITS MHz kHz
Table 14: SPI AC characteristics Parameters are guaranteed by design. They are not tested in production. 1) Max. bus capacitance on SO line shall be lower than 100pF when Vcc > 1.8V and lower than 50pF when Vcc < 1.8V. 2) Spikes on SCK signal shorter than 20ns are suppressed.
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EM3027
CS
tCC tCH
tF tCL
t tCCH tCWL
SCK
tDC tCDH A0 SI data are don't care when SO outputs data
SI
R/W
SPI Master writes address, EM3027 outputs data: SO
HiZ D7
tCDD
tCDZ
D0
Figure 9: SPI Read Timing
CS
tCC tCH
tF tCL
t tCCH tCWL
SCK
tDC tCDH A0 D7 D0
SI
R/W
SPI Master writes address and data: SO
HiZ
Figure 10: SPI Write Timing
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EM3027
11 Package Information
11.1 TSSOP-08/14
4 B 32 1 B E/2 1.00 E E1 5 C L B 1.00 1.00 DIA. C
A4 TOP VIEW b bbb M C A-B A2 D9
0.05 C
3
e D 5
A1
SEATING PLANE
S Y M B O L
A A1 A2 aaa b b1 bbb c c1 D E1 e E L N P P1
COMMON DIMENSIONS MIN. NOM. 0.05 0.85 0.90 0.076 0.19 0.19 0.22 0.10 0.09 0.09 0.127 SEE VARIATIONS 4.30 4.40 0.65 BSC 6.40 BSC 0.50 0.60 SEE VARIATIONS SEE VARIATIONS SEE VARIATIONS 0
MAX. 1.10 0.15 0.95 0.30 0.25 0.20 0.16 4.50 0.70
N VARIO T E ATIONS
NOTE
MIN. 2.90 4.90
9
NOTES: 1. DIE THICKNESS ALLOWABLE IS 0.2790.0127 2. DIMENSIONING & TOLERANCES PER ASME. Y14.5M-1994. 3. DATUM PLANE H LOCATED AT MOLD PARTING LINE AND COINCIDENT WITH LEAD, WHERE LEAD EXITS PLASTIC BODY AT BOTTOM OF PARTING LINE. 4. DATUM A-B AND D TO BE DETERMINED WHERE CENTERLINE BETWEEN LEADS EXITS PLASTIC BODY AT DATUM PLANE H.
5 5 6 7
5. "D" & "E1" ARE REFERENCE DATUM AND DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS, AND ARE MEASURED AT THE BOTTOM PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.15mm ON D AND 0.25mm ON E PER SIDE. 6. DIMENSION IS THE LENGTH OF TERMINAL FOR SOLDERING TO A SUBSTRATE. 7. TERMINAL POSITIONS ARE SHOWN FOR REFERENCE ONLY. 8. FORMED LEADS SHALL BE PLANAR WITH RESPECT TO ONE ANOTHER WITHIN 0.076mm AT SEATING PLANE. 9. THE LEAD WIDTH DIMENSION DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.07mm TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND AN ADJACENT LEAD SHOULD BE 0.07mm
8
ALL DIMENSIONS IN MILLIMETERS
Copyright (c) 2009, EM Microelectronic-Marin SA 12/09 - rev D
C
C
D
0.20 C A-B D 2X N/2 TIPS
N
e/2 7 4 SEE DETAIL "A" END VIEW X EVEN LEAD SIDES TOPVIEW (14)
X
X = A AND B
ODD LEAD SIDES TOPVIEW
0.25 A H aaa 8 L6 (1.00) DETAIL 'A' (VIEW ROTATED 90 C.W.) (14)
PARTING LINE
H
5 D NOM. 3.00 5.00
MAX. 3.10 5.10
P MAX. 1.59 3.1
P1 MAX. 3.2 3.0
7 N 8 14
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EM3027
11.2 SO-8
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EM3027
12 Ordering Information
EM3027 I D X SO8B
Part Number EM3027 = Interface I2C bus = SPI bus = I S RTC SO8B= TP8B= TP14= WS11= 8 pin SO8 tape 8 pin TSSOP8 tape 14 pin TSSOP14 tape Wafer sawn 11 MILS Package
Temperature compensation Default Temp. Compensation = (Factory Standard) D
Functional Temperature Standard temperature= S Extended temperature= X
Standard Versions Part Number EM3027IDSTP8A+ EM3027IDSTP8B+ EM3027IDXTP8B+ EM3027IDSSO08A+ EM3027IDSSO08B+ EM3027IDXSO08B+ EM3027SDSTP14A+ EM3027SDSTP14B+ EM3027SDXTP14B+ Package TSSOP8 TSSOP8 TSSOP8 SO8 SO8 SO8 TSSOP14 TSSOP14 TSSOP14 Functional Temperature -40 +85C -40 +85C -40 +125C -40 +85C -40 +85C -40 +125C -40 +85C -40 +85C -40 +125C Interface I2C I2C I2C I2C I2C I2C SPI SPI SPI Delivery Form Stick , 100 pcs Tape & Reel, 4000 pcs Tape & Reel, 4000 pcs Stick, 97 pcs Tape & Reel, 2500 pcs Tape & Reel, 2500 pcs Stick, 96 pcs Tape & Reel, 3500 pcs Tape & Reel, 3500 pcs Marking 3027S5 3027S5 3027X5 3027S5 3027S5 3027X5 3027S6 3027S6 3027X6
Please contact Sales office for other versions not shown here and for availability of non standard versions.
EM Microelectronic-Marin SA (EM) makes no warranty for the use of its products, other than those expressly contained in the Company's standard warranty which is detailed in EM's General Terms of Sale located on the Company's web site. EM assumes no responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does not make any commitment to update the information contained herein. No licenses to patents or other intellectual property of EM are granted in connection with the sale of EM products, expressly or by implications. EM's products are not authorized for use as components in life support devices or systems.
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